High-Performance Architecture Using Fast Dynamic Reconfigurable Accelerators

TitleHigh-Performance Architecture Using Fast Dynamic Reconfigurable Accelerators
Publication TypeJournal Article
Year of Publication2018
AuthorsYang P-L, Marek-Sadowska M
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume26
Issue7
Start Page1209
Date Published07/2018
URLhttp://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8331268&isnumber=8396231
DOI10.1109/TVLSI.2018.2814627
Grant: 
CSC